An Abstract of the Thesis of Title: Compensation Techniques for Cascaded Delta-sigma A/d Converters and High- Performance Switched-capacitor Circuits All Rights Reserved Compensation Techniques for Cascaded Delta-sigma A/d Converters and High-performance Switched-capacitor Circuits Redacted for Privacy

approved: Gabor C. Temes This thesis describes compensation techniques for cascaded delta-sigma A/D converters (ADCs) and high-performance switched-capacitor (SC) circuits. Various correlated-double-sampling (CDS) techniques are presented to reduce the effects of the nonidealities, such as clock feedthrough, charge injection, opamp input-referred noise and offset, and finite opamp gain, in SC circuits. A CDS technique for the compensation of opamp input-referred offset and clock-feedthrough effect is examined and improved to achieve continuous operation. Experimental results show that after the compensation, the SC integrator's output signal swing is greatly increased. The effects of the analog circuitry nonidealities in delta-sigma ADCs are also analyzed. The analysis shows that the nonidealities in cascaded delta-sigma ADCs cause noise leakage, which limits the overall performance of the cascaded modulators. In order to reduce the noise leakage, a novel adaptive compensation technique is proposed. To verify the effectiveness of the proposed compensation techniques, a prototype 2-0 cascaded modulator was designed. Its first stage, a second-order delta-sigma modulator with test signal input circuit, was designed and fabricated in 1.2 gm CMOS technology. The measurement results show that the noise leakage is reduced effectively by the compensation, and the performance of the cascaded delta-sigma modulator is greatly improved. Redacted for Privacy